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512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
WRITE Operation
Figure 28: Random WRITE Cycles
T0
T1
T2
T3
CLK
Command
Address
DQ
WRITE
Bank,
Col n
D IN
n
WRITE
Bank,
Col a
D IN
a
WRITE
Bank,
Col x
D IN
x
WRITE
Bank,
Col m
D IN
m
Don’t Care
Note:
1. Each WRITE command can be issued to any bank. DQM is LOW.
Figure 29: WRITE-to-READ
T0
T1
T2
T3
T4
T5
CLK
Command
WRITE
NOP
READ
NOP
NOP
NOP
Address
Bank,
Col n
Bank,
Col b
DQ
D IN
n
D IN
n+1
D OUT
b
D OUT
b+1
Don’t Care
Note:
1. The WRITE command can be issued to any bank, and the READ command can be to any
bank. DQM is LOW. CL = 2 for illustration.
PDF: 09005aef8459c827
512mb_mobile_sdram_y67m_at.pdf – Rev. B 3/11 EN
58
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2011 Micron Technology, Inc. All rights reserved.
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